MemryX MX3+ targets more edge AI capacity within the same power envelope
MemryX is targeting up to 10 times the peak AI compute and nearly 10 times the on-chip model memory of MX3 with the MX3+ accelerator, which is planned for 2027.
AT A GLANCE
Key points
- MX3+ targets more than 1 POPS of peak inference.
- MemryX claims up to 10x compute and nearly 10x on-chip memory versus MX3.
- The design aims to retain the same low-power envelope and silicon footprint.
- Availability is targeted for 2027, and the figures remain provider design targets.
What is changing?
MemryX announced the MX3+ accelerator on November 10 for low-power edge AI inference. Its design target is to exceed 1 POPS while retaining the same low-power envelope and silicon footprint as MX3, with up to 10 times more peak AI compute and nearly 10 times more on-chip model-weight capacity. These figures are provider targets for a product that has not yet entered production, not independent measurements.
MX3+ is positioned for higher-resolution vision models, transformer architectures, small language models, vision-language-action systems, and multimodel pipelines. Target uses include industrial automation, robotics, intelligent transportation, and healthcare devices. MemryX plans availability in 2027; board, compiler, and real-workload performance have not yet been validated in the field.
Explore the original sources
Source date: 10 November 2026.
Published by AI Radar: 11 Nov 2026, 00:12 (Istanbul, UTC+3).
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